This application note explains the XC9500™/XL/XV Boundary Scan interface and demonstrates the software available for programming and testing XC9500/XL/XV CPLDs. An appendix summarizes the iMPACT software operations and provides an overview of the additional operations supported by XC9500/XL/XV CPLDs for in-system programming.
IEEE Boundary Scan Standard 1149.1, also known as JTAG, is a testing standard that uses software to reduce costs. The primary benefit of the standard is its ability to transform difficult printed circuit board testing problems into well-structured, efficient solutions that are easily performed in software. The standard defines a hardware architecture and the mechanisms for its use.
The JTAG standard itself defines instructions that can be used to perform functional and interconnect tests as well as built-in self test procedures. Vendor-specific extensions to the standard allow execution of maintenance and diagnostic applications as well as permit programming algorithms for reconfigurable parts.
Connecting Devices in a Boundary Scan Chain
All devices in the chain share the TCK and TMS signals. The system TDI signal is connected to
the TDI input of the first device in the Boundary Scan chain. The TDO signal from that first
device is connected to the TDI input of the second device in the chain and so on. The last
device in the chain has its TDO output connected to the system TDO pin. This configuration is
illustrated in Figure 1.
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