This chapter will take you through the basic steps involved in programming Xilinx devices in-system using the JTAG Programmer graphical user interface. This chapter contains the following sections:
• Cable Setup
• Selecting a Port for the Cable
• Creating New Chain Descriptions
• Configuring a Device In-System
• Options Specific to Proms
• Generating SVF Files
Cable Setup
To setup your system to download configurations in-system you must first connect the JTAG Programmer parallel download, Multi-LINX, or the XChecker cable. Cable setups and power sequencing are described in chapter 2, Hardware.
Selecting a Port for the Cable
Note If you do not want to use a cable, select SVF Output and skip this section.
1. You may select a serial or parallel port for your cable from the JTAG Programmer Interface. To set up a port:
Output ? Cable Setup
2. The Cable Communication Setup dialog box will appear.
jtag cable communication
3. Select the cable you are using and match to the port you are using, then click on OK. If you are using the XChecker Cable or the MultiLINX cable on the serial port you may also select a BAUDrate. See Table 2-2, Valid Baud Rates.
4. Alternatively, you may use the Output ? Cable Auto Connect to allow the software to automatically identify and connect to whichever download cable is installed.
5. Upon selecting any device operation, the JTAG Programmer will automatically connect to whichever cable is installed and powered up, with the following priority: Parallel, MultiLINX, XCHecker.
6. If you accidentally or purposely power down your system while running JTAG Programmer, remember to select Output ? Cable Reset to reinitialize the cable after re-applying power.
Creating New Chain Descriptions
A Chain Description File (CDF) is a file that contains all the information needed by the JTAG Programmer to download your designs to devices in a JTAG chain in-system. The device chain U1, U2, … Un is a serial chain where U1 is the first device TDI enters and Un is the last device. Un must deliver the TDO (labelled RD on the XChecker and MultiLINX cables) signal back to the cable. TMS and TCK signals enter all devices in parallel.
jtag chain
The chain description must contain all devices in the order that they appear in the JTAG programming chain. Alternatively, you can use the Initialize Chain operation to automatically identify the devices in the system boundary-scan chain. You must then associate JEDEC files for XC9500/XL/XV CPLD devices, BIT files for Xilinx FPGA devices, MCS, HEX or EXO files for Xilinx Prom devices. Use BSDL files or specify the instruction register level for all other devices by using the device properties dialog box.
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